ZeroPlus Technology Co Ltd
ZeroPlus LAP-F(14064M) 40-Channel 64M Capture Buffer Logic Analyser
ZeroPlus LAP-F(14064M) 40-Channel 64M Capture Buffer Logic Analyser
SKU: LAP-F(14064M)
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Key Features
Overview
Advanced Multi-Channel Logic Analysis for Professional Engineers
The ZeroPlus LAP-F Logic Analyser represents the pinnacle of PC-based logic analysis technology, delivering uncompromising performance for professional embedded system development. This sophisticated instrument combines high-speed 1GHz sampling rates with exceptional memory depth up to 64Mb per channel, making it ideal for debugging complex digital systems and validating high-speed protocols.
Professional-Grade Features
Available in 40-channel and 64-channel configurations, the LAP-F series offers flexible memory options from 4Mb to 64Mb per channel. The analyser excels at capturing long data sequences whilst maintaining precise timing resolution, essential for identifying intermittent faults and timing violations in modern digital designs.
The instrument includes over 110 built-in protocol decoders as standard, covering everything from I2C and SPI to advanced automotive protocols like CAN and LIN. The innovative Long-Time Record function enables continuous streaming directly to your computer's storage, allowing acquisition periods extending from hours to days - perfect for capturing elusive intermittent issues.
With its robust aluminium construction, comprehensive probe selection including specialised eMMC probes, and professional software suite, the LAP-F delivers the reliability and functionality demanded by serious electronics engineers developing next-generation embedded systems.
Downloads
Why Engineers Choose The ZeroPlus LAP-F High-Performance PC-Based Logic Analyser 40/64 Channel
Unmatched Signal Capture Depth
Professional Protocol Analysis
Long-Term Reliability Testing
Extremely compact and lightweight, the ZeroPlus ZeroPlus-LAP-F logic analyser connects to and is powered by the USB port of any desktop or ZeroPlus-Laptop PC making it very portable and ideal for use in the field.
The ZeroPlus-LAP-F) provides internal sampling rates up to 1GHz and up to 512M samples memory depth per channel.
Trigger
- 6 protocol triggers (hardware)(serial): I2C, I2S, SPI, SVID, UART(RS-232C/422/485), CAN 2.0B
- Trigger types: Pattern / Edge / Pulse-Width / Interval
- Trigger channels: 40
- Trigger delay: Yes
- Trigger levels: 256
- Trigger pass: 1-65535
Special Software Features
- Zooming and panning
- Waveform and UI Customization
- State list and Waveform view
- Packet list
- Waveform Navigator
- Memory view
- Statistic
- File Comparison
Certifications
- FCC / CE
Active Probes/Signals
P120LV
P200EM (4 ch + 1 ch (CLK))
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Protocol Analysis Feature
Over 130 different protocols can be analysed by the LAP-C logic analyser: .
- 1-Wire (Adv) Interface
- 1-Wire Interface
- 3-Wire Interface
- 7-segment LED Interface
- AC97 Interface
- AES/EBU Interface
- AMD SVI2 Interface
- Arithmetic Logic
- BDM Interface
- BMS Interface
- CAN 2.0B Bus
- CCIR656 Interface
- CMOS Image Sensor Interface
- Compact Flash 4.1 Interface
- DALI Interface
- Differential Manchester Interface
- Digital Logic
- DigRF Interface
- DMX512 Interface
- DP Aux Channel 1.1 Interface
- DSA Interface
- DSI Bus
- FlexRay 2.1A Bus
- FWH Interface
- GPIB/IEEE488 Interface
- HART Interface
- HD Audio Interface
- HDMI CEC Interface
- HDQ Interface
- HPI Interface
- I2C EEPROM 24L Memory Interface
- I2C EEPROM 24LCS Memory Interface
- I2C Interface
- I2S Interface
- ISO7816 UART Interface
- J-K Flip-flop
- JTAG 2.0 Interface
- KeeLoq Code Hopping Interface
- KNX Interface
- LCD12864 Display Interface
- LCD1602 Display Interface
- LED Pitch Array Interface
- LG4572 Interface
- LIN Bus 2.1
- Line Code
- LPC Bus
- LPC-SERIRQ Interface
- LPT Interface
- Manchester Encoding
- Maxim DS1302 Interface
- Maxim DS18B20 Interface
- MCU-51 Disassembly
- MDDI Interface
- MHL-CBus
- Microwire Bus
- Microwire EEPROM 93C
- MIDI Interface
- MII Interface
- Miller Interface
- MIPI CSI-2 Interface
- MIPI DSI Interface
- ModBus
- Modified Miller Interface
- Modified SPI Interface
- MVB
- NEC PD6122 Interface
- Opentherm 2.2 Interface
- PCI Bus
- PCM Interface
- PECI Interface
- Philips RC5 Interface
- Philips RC6 Interface
- ProfiBus
- PS/2 Interface
- PSB Interface
- PT2262/PT2272 Interface
- Quad SPI Interface
- RGB Interface
- S/PDIF Interface
- S2Cwire/AS2Cwire Interface
- Samsung K9 NAND Flash Interface
- SCCB Interface
- SD2.0/SDIO Interface
- SDQ Interface
- Serial GPIO IBPI Interface
- SHT11 Interface
- Signia 6210 Interface
- Single Wire Debug (SWD) Interface
- SITI DM114/DM115 Interface
- SLE4442 Interface
- SMBus 2.0
- SPI (Atmel 25F EEPROM)
- SPI Interface
- SPI Plus Interface
- SSI Interface
- ST7669 Interface
- STBus
- SVID Interface
- UART (RS-232C/RS-422/RS-485) Interface
- UNI/O Interface
- Up/Down Counter
- USB v1.1 Interface
- USB v2.0 Interface
- WIEGAND Interface
- WTB Bus
- WWV-WWVH-WWVB Interface
- YK-5 Interface
Test Probes
Ninety two Test probes are included with the basic analyser. Additional hooks are available as spares when needed.
| General Information | |
|---|---|
Part Number (SKU) |
LAP-F(14064M)
|
Manufacturer |
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| Physical and Mechanical | |
Weight |
2.0 kg
|
| Other | |
EAN |
5055383686735
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Questions and Answers
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Does the LAP-F Support Windows 10?
Yes. The LAP-F supports Windows 7, 8.1 and 10, with the latest ZeroPlus software.
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What Makes the LAP-F Different From Entry-Level USB Logic Analysers?
The LAP-F captures into its own onboard memory, so its sample rate (up to 2GHz) is not limited by USB bandwidth as it is on streaming USB analysers. It also has deeper memory, professional triggering and protocol analysis software. For longer captures, the Long Time Record function writes data to the PC over USB 3.0.
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Can the LAP-F Analyse eMMC and SD Card Interfaces?
Yes, with the optional eMMC 5.1/SD 3.0 capability. It gives 32 channels at 2GHz sampling for eMMC/SD analysis, with dedicated triggering and decoding.
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What Is the Trigger Capability of the LAP-F?
The LAP-F has a 256-level trigger sequence engine. It supports pattern, edge, pulse-width, interval and protocol-based triggering, with hardware triggers for I2C, SPI, UART, CAN and other protocols.
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Which LAP-F Model Should I Choose?
The LAP-F1 comes in 40-channel (LAP-F1-40) and 64-channel (LAP-F1-64) versions, with up to 2GHz timing sampling, a 256-level trigger sequence and memory from 4Mb to 512Mb per channel. Tell us the channels and capture length you need and we'll recommend a configuration.
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What Is the Maximum Sampling Rate of the LAP-F Logic Analyser?
The ZeroPlus LAP-F samples at up to 2GHz internally for timing analysis and 200MHz for external state analysis.
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How Many Protocol Decoders Are Included with the LAP-F?
The LAP-F includes more than 130 built-in protocol decoders, covering automotive (CAN), embedded (I2C, SPI, UART) and advanced protocols (USB). eMMC/SD decoding is part of the optional eMMC 5.1/SD 3.0 capability.
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What Memory Depths Are Available for the LAP-F Series?
The LAP-F offers 4Mb, 64Mb, 256Mb or 512Mb per channel depending on the memory option, up to 1Gb with channel folding. Channel folding concentrates the total memory into fewer channels for deeper per-channel memory.
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How Does the Long-Time Record Function Work?
Long-Time Record streams captured data straight to your computer's hard drive via USB 3.0. That gives continuous acquisition for hours or days, depending on sampling settings.
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What Probe Types Are Included with the LAP-F?
ZeroPlus lists the P120LV low-voltage probe for the LAP-F. The optional eMMC package includes 4 eMMC probes, and other probes, such as the P300ST, are available separately. Ask us which probes suit your target.
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