TC2030-CTX-ETM Pinout: 20-Pin Cortex Debug+ETM to TC2030 and TC2050

Tag-Connect · Cable pinout

The TC2030-CTX-ETM splits a 20-pin 0.05″ Cortex Debug+ETM connector across two Tag-Connect heads: a 6-pad TC2030 for SWD, SWO and reset, and a 10-pad TC2050 for 4-bit ETM trace. Your PCB needs both footprints, and no headers.

Debugger end
20-pin 0.05″ (1.27 mm) Cortex Debug+ETM
Board end
TC2030 (6 pads) + TC2050 (10 pads)
Interface
SWD + SWO + nRESET + 4-bit ETM trace
Not carried
Full JTAG (TDI, nTRST)

Connector to Tag-Connect Heads

SWD Head: Pins 1 to 10 to TC2030

TC2030-CTX-ETM debug head: 20-pin connector pins 1 to 10 to the TC2030 footprint Pin 1 VTref goes to pad 1, pin 2 SWDIO to pad 2, pin 10 nRESET to pad 3, pin 4 SWCLK to pad 4, pins 3, 5 and 9 ground to pad 5, pin 6 SWO to pad 6. Pins 7 and 8 are not connected. Pins 11 to 20 go to the TC2050 trace head. The footprint is drawn from the PCB top side with the single alignment hole on the right. key 1234567891011121314151617181920 123456 VTref · pin 1 → pad 1GND · pins 3,5,9 → pad 5nRESET · pin 10 → pad 3SWO · pin 6 → pad 6SWCLK · pin 4 → pad 4SWDIO · pin 2 → pad 2 DEBUGGER END 20-pin 0.05″ Cortex Debug+ETM, pin side, pin 1 top left BOARD END TC2030, PCB top view, hole on the right
Power reference Ground Data Clock Reset Trace Not connected
Alignment hole Ø0.99 mm (0.039″), non-platedKeep-out: no tracks or viasPad Ø0.79 mm (0.031″), no solder paste
The TC2030 head is wired exactly as the TC2030-CTX. Pins 11 to 20 are shown grey here because they go to the TC2050 trace head, drawn below. The footprint is drawn from the component side with the single alignment hole on the right.

Trace Head: Pins 11 to 20 to TC2050

TC2030-CTX-ETM trace head: 20-pin connector pins 11 to 20 to the TC2050 footprint Pin 11 GND or target power goes to pad 1, pin 13 GND or target power to pad 2, pins 15, 17 and 19 ground to pads 3, 4 and 5, pin 20 TRACEDATA3 to pad 6, pin 18 TRACEDATA2 to pad 7, pin 16 TRACEDATA1 to pad 8, pin 14 TRACEDATA0 to pad 9, pin 12 TRACECLK to pad 10. Pins 1 to 10 go to the TC2030 head. The footprint is drawn from the PCB top side with the single alignment hole on the right. key 1234567891011121314151617181920 12345678910 GND/TgtPwr · pin 11 → pad 1GND/TgtPwr · pin 13 → pad 2GND · pin 15 → pad 3GND · pin 17 → pad 4GND · pin 19 → pad 5TRACEDATA[3] · pin 20 → pad 6TRACEDATA[2] · pin 18 → pad 7TRACEDATA[1] · pin 16 → pad 8TRACEDATA[0] · pin 14 → pad 9TRACECLK · pin 12 → pad 10 DEBUGGER END 20-pin 0.05″ Cortex Debug+ETM, pin side, pin 1 top left BOARD END TC2050, PCB top view, hole on the right
Power reference Ground Data Clock Reset Trace Not connected
Alignment hole Ø0.99 mm (0.039″), non-platedKeep-out: no tracks or viasPad Ø0.79 mm (0.031″), no solder paste
Pins 1 to 10 are shown grey here because they go to the TC2030 head above. Route TRACECLK and the four TRACEDATA lines as short, matched-length tracks. TC2050 pads are numbered 1 to 5 along one row and 6 to 10 back along the other, so pad 10 sits opposite pad 1, as on Tag-Connect's TC2050-IDC drawing. The footprint is drawn from the component side with the single alignment hole on the right.

Pin Table

TC2030 Head

TC2030 pad Signal Cortex Debug+ETM pin Connect on your PCB to
1 VTref 1 Target Vdd. Sets the debugger's I/O level; no series resistor
2 SWDIO / TMS 2 MCU SWDIO
3 nRESET 10 MCU reset pin, active low
4 SWCLK / TCK 4 MCU SWCLK
5 GND 3, 5, 9 Ground. Pin 9 is GNDDetect, so the debugger sees a target attached
6 SWO / TDO 6 MCU SWO, for trace output. Optional: leave unconnected if not used

TC2050 Trace Head

TC2050 pad Signal Cortex Debug+ETM pin Connect on your PCB to
1 GND / TgtPwr+cap 11 Ground, or target power with a decoupling capacitor
2 GND / TgtPwr+cap 13 Ground, or target power with a decoupling capacitor
3 GND 15 Ground
4 GND 17 Ground
5 GND 19 Ground
6 TRACEDATA[3] 20 MCU TRACED3
7 TRACEDATA[2] 18 MCU TRACED2
8 TRACEDATA[1] 16 MCU TRACED1
9 TRACEDATA[0] 14 MCU TRACED0
10 TRACECLK 12 MCU TRACECLK

Cortex Debug+ETM pins 7 (key) and 8 (NC/TDI) are not carried. If your design needs full JTAG, use the 10-pad TC2050-IDC-050-ALL family instead.

Pinout confirmed?The TC2030-CTX-ETM plugs straight into your debugger's 20-pin Cortex connector.

Buy TC2030-CTX-ETM →

Footprint

  • Six pads, Ø0.79 mm (0.031″), on a 1.27 mm (0.050″) pitch in two rows of three. Seen from the component side with the single alignment hole on the left, the top row is pads 2, 4, 6 and the bottom row is 1, 3, 5.
  • Legged cables need four extra latch holes; the no-legs (NL) footprint needs only the pads and alignment holes. Mechanical drawings (PDF): TC2030 legged footprint, Rev B and TC2030-NL no-legs footprint, Rev B.
  • No solder paste on the pads. Keep other tracks at least 0.5 mm (0.020″) from any pad.
  • Mark the footprint "do not fit" on your BOM, so nobody tries to buy a part for it.
  • The TC2050 trace footprint has ten Ø0.79 mm pads on the same 1.27 mm pitch, in two rows of five, numbered 1 to 5 along one row and 6 to 10 back along the other. Seen from the component side with the single alignment hole on the left, the bottom row is pads 1 to 5 left to right. Tag-Connect refers to the legged TC2050-IDC footprint for this cable, so lay out the latch holes. Drawings (PDF): TC2050 legged footprint, Rev A and TC2050-NL no-legs footprint.

Debuggers This Cable Fits

Tag-Connect lists the IAR I-jet and Keil ULINKpro, and any debugger with the 20-pin 0.05″ Cortex Debug+ETM connector. To capture parallel trace the debugger needs a trace port: the ULINKpro has one; check that your own debugger has one before you rely on trace. Without trace you only need the TC2030-CTX-20. Full list in our Tag-Connect cable guide.

Other Versions of This Cable

No other cable shares this connector and head pair. The TC2030-CTX-20 has the same 20-pin connector without the trace head.

Cable Tag-Connect head What is different
TC2030-CTX-ETMthis page TC2030 legged + TC2050 The only version. Tag-Connect makes no NL, SOFT or LEMTA version of this cable. Buy →

Questions

Why Does the TC2030-CTX-ETM Have Two Heads?

The 6-pad TC2030 carries SWD, SWO and reset from pins 1 to 10. The 10-pad TC2050 carries TRACECLK, four TRACEDATA lines and grounds from pins 11 to 20, for 4-bit parallel ETM trace.

Do I Need Both Footprints on My PCB?

Yes, to use the cable as made. If you only need SWD and SWO, fit the TC2030 footprint and use the TC2030-CTX-20 instead.

Which TC2050 Pad Carries TRACECLK?

Pad 10, wired to pin 12 of the 20-pin connector. TRACEDATA0 to 3 are on pads 9, 8, 7 and 6.

Buy the Cable and Accessories

Everything on this page uses the TC2030-CTX-ETM. Add the demo PCB to try both footprints before your board goes to fab.

This cable

TC2030-CTX-ETM

Two-head Plug-of-Nails cable: TC2030 for SWD, TC2050 for 4-bit ETM trace, from one 20-pin 0.05″ connector.

Buy TC2030-CTX-ETM →

TC-FOOTPRINT

Demo PCB with every Tag-Connect footprint, to try cables before you commit a layout.

Buy TC-FOOTPRINT →

Pin assignment: Tag-Connect TC2030-CTX-ETM product page and Cortex-20 cable selection guide. TC2030 footprint: Tag-Connect TC2030-IDC footprint drawing, Rev B. TC2050 footprint: Tag-Connect TC2050-IDC datasheet, Rev A, and KiCad library Tag-Connect_TC2050-IDC-FP. Checked 5 Oct 2026. Diagram redrawn by Debug Store in our house style. Tag-Connect and Plug-of-Nails are trademarks of Tag-Connect LLC. Debug Store is a UK specialist distributor of embedded debug, programming and test equipment, supplying engineers worldwide since 1990.

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