The SEGGER MIPI-60 Adapter (SKU: 8.06.42) links SEGGER J-Link, J-Trace or Flasher probes to Texas Instruments Jacinto7 targets that expose a 60-pin MIPI debug header. It presents two standard probe connectors on the adapter: a 19-pin Cortex-M debug/trace header and a 20-pin 0.1" Arm JTAG/SWD header. Up to 4-bit TPIU trace is supported via the 19-pin header.
Designed for TI Jacinto7 boards with the 60-pin MIPI debug interface, the adapter carries JTAG/SWD signals and supports 4-bit trace from the target. Use with SEGGER J-Link, J-Trace or Flasher families.
For other connector standards, see the SEGGER 19-Pin Cortex-M Adapter and SEGGER J-Link Mictor 38 Adapter. For instruction-trace and coverage, pair with J-Trace PRO Cortex or, for high-duty production/debug, J-Link PRO.
If your TI Jacinto7 board exposes MIPI-60, this adapter provides a straightforward, passive bridge to common SEGGER probe connectors without bespoke cabling. It reduces setup time and de-risks signal mapping by following Arm/MIPI debug connector guidance.
Note: See the schematic for exact pin mapping.
- key_feature_2: Dual Output Headers - key_feature_2_tooltip: {"type":"root","children":[{"type":"paragraph","children":[{"type":"text","value":"Presents both 19-pin Cortex-M and 20-pin Arm 0.1\" headers on one board, simplifying connection to a wide range of SEGGER probes and targets while maintaining standardised pinouts for JTAG/SWD and optional 4-bit trace capture workflows."}]}]} - key_feature_3: TI Jacinto7 Focus - key_feature_3_tooltip: {"type":"root","children":[{"type":"paragraph","children":[{"type":"text","value":"Purpose-built to mate with TI Jacinto7 boards that expose the 60-pin MIPI debug header, eliminating guesswork and custom harnesses when bringing up automotive and vision SoCs in lab or production environments."}]}]} - key_feature_4: 4-Bit TPIU Trace Support - key_feature_4_tooltip: {"type":"root","children":[{"type":"paragraph","children":[{"type":"text","value":"Enables up to 4-bit trace via the 19-pin header using the TPIU funnel on Cortex-M class targets, allowing lightweight timing/printf-like trace without the complexity of full ETM, ideal for performance tuning and event correlation."}]}]} - key_feature_5: JTAG & SWD on One Adapter - key_feature_5_tooltip: {"type":"root","children":[{"type":"paragraph","children":[{"type":"text","value":"Carries both classic IEEE-1149.1 JTAG and Arm Serial-Wire Debug signals, keeping your lab flexible across device families and reducing the number of dedicated fixtures you need to keep on hand."}]}]} - key_feature_6: Passive, Standards-Aligned Mapping - key_feature_6_tooltip: {"type":"root","children":[{"type":"paragraph","children":[{"type":"text","value":"Implements a straightforward, passive pin mapping consistent with Arm/MIPI connector recommendations, aiding signal integrity and making it easier to cross-reference signals against datasheets and the published schematic."}]}]} - key_feature_7: Works Across SEGGER Families - key_feature_7_tooltip: {"type":"root","children":[{"type":"paragraph","children":[{"type":"text","value":"Intended for use with J-Link, J-Trace and Flasher tool families, so one adapter covers interactive debug, code trace and in-circuit programming use cases without changing the target-side connection standard."}]}]} - key_feature_8_tooltip: {"type":"root","children":[{"type":"paragraph","children":[{"type":"text","value":"Compact PCB reduces cable strain and clutter around your DUT, making it easier to route short ribbon cables cleanly and preserve signal quality during bring-up, regression testing and long-running trace captures."}]}]} - key_feature_8: Small, Bench-Friendly Form Factor - 1569389: What does the MIPI-60 Adapter do?***SIMP***It bridges a TI Jacinto7 board’s 60-pin MIPI debug header to standard SEGGER probe connectors (19-pin Cortex-M with 4-bit trace, and 20-pin Arm JTAG/SWD). - 1569391: Does it support ETM/PTM instruction trace?***SIMP***It supports up to 4-bit TPIU trace via the 19-pin header. For full ETM streaming trace, pair your target with a J-Trace PRO. - 1569392: Is the mapping published?***SIMP***Yes, SEGGER provides the adapter schematic so you can review and verify pin assignments. - 1569393: Will it power my target?***SIMP***No. It routes debug/trace signals only; power your target separately according to the board’s design. (General SEGGER adapter behaviour; see schematic.) - 1569394: What’s the difference between the 19-pin and 20-pin outputs?***SIMP***The 19-pin header is the 0.05″ Cortex-M debug/trace connector (supports 4-bit TPIU). The 20-pin header is the 0.1″ Arm JTAG/SWD connector without trace. - 1569395: Can I use it with non-Jacinto boards?***SIMP***It’s designed for targets that expose the 60-pin MIPI debug header; many boards don’t. For other connectors, see the 19-pin Cortex-M or Mictor-38 adapters:19-Pin Cortex-M Adapter J-Link Mictor-38 Adapter - 1569396: What is TPIU and when would I use it?***SIMP***The Trace Port Interface Unit funnels trace to a 1/2/4-bit port; use it for lightweight timing and event capture without full ETM. - 1569398: Where can I learn more about the MIPI-60 debug connector?***SIMP***See ARM’s MIPI-60 pinout guidance and MIPI Alliance articleson debug/trace. - why_people_choose_3_title: Standards-Aligned, Passive Mapping - why_people_choose_2_title: Flexible Probe Connectivity - why_people_choose_1_title: Direct Jacinto7 Compatibility - why_people_choose_1: Mates to TI’s 60-pin MIPI debug header, avoiding custom wiring and reducing bring-up risk on Jacinto-based designs. - why_people_choose_3: Uses standard Arm/MIPI debug connectors; schematic available for easy verification and documentation. - why_people_choose_2: 19-pin Cortex-M and 20-pin Arm headers cover JTAG/SWD and 4-bit trace in one board, simplifying lab setups.