ETH 3 Click Board

Product Description

How Does The ETH 3 Click Board™ Work?

The ETH 3 Click Board™ as its foundation uses the LAN9250, a fully-featured high-performance 10/100 Ethernet controller designed for embedded applications, where performance and flexibility are required, from Microchip Technology. It complies with the IEEE 802.3 (Full/Half-duplex 10BASE-T and 100BASE-TX) Ethernet protocol, IEEE 802.3az Energy Efficient Ethernet (100Mbps only), and the IEEE 1588v2 precision time protocol. It also includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. The integrated checksum offload engines enable the automatic generation of the 16-bit checksum for received and transmitted Ethernet frames, offloading the CPU task.

The LAN9250 also includes large transmit and receive data FIFOs to accommodate high latency applications. If the FIFO gets too full, the LAN9250 can automatically generate flow control packets to the remote node or assert back-pressure on the remote node by causing network collisions. Also, the LAN9250 memory buffer architecture allows highly efficient use of memory resources by optimizing packet granularity and support features that reduce or eliminate packet loss. This Click board™ enables network connections and maintains signal integrity sent over an Ethernet cable through the onboard RJ-45 connector.

The ETH 3 Click Board™ communicates with MCU using the SPI/QuadSPI serial interface. An SPI/QuadSPI with a clock rate of up to 80 MHz allows access to the System CSRs, internal FIFOs, and memories. It supports single and multiple registers read and write commands with incrementing, decrementing, and static addressing. The LAN9250 also contains an I2C master EEPROM controller for connection to an optional EEPROM and allows for the storage and retrieval of static data using the I2C serial interface.

It also provides a programmable interrupt structure generated internally by the various device sub-modules or configured to create a single external host interrupt available on the onboard header. An additional Wake-up feature is available that places the LAN9250 in a reduced power mode and can be programmed to issue an external wake signal labeled as PME on the mikroBUS™ socket. This signal is ideal for triggering system Power-Up using remote Ethernet Wake-up events. Also, this Click board™ can reset through the Hardware Reset pin, labeled as RST on the mikroBUS™ socket.

The ETH 3 Click Board™ operates only with a 3.3V logic voltage level. The board must perform appropriate logic voltage level conversion before use with MCUs with different logic levels.

SPECIFICATIONS

PINOUT DIAGRAM

This table shows how the pinout on ETH 3 Click corresponds to the pinout on the mikroBUS™ socket (the latter shown in the two middle columns).

Notes	Pin					Pin	Notes
Wake-up Detection	PME	1	AN	PWM	16	NC
Reset	RST	2	RST	INT	15	INT	Interrupt
SPI Chip Select	CS	3	CS	RX	14	NC
SPI Clock	SCK	4	SCK	TX	13	NC
SPI Data OUT	SDO	5	MISO	SCL	12	SCL	I2C Clock
SPI Data IN	SDI	6	MOSI	SDA	11	SDA	I2C Data
Power Supply	3.3V	7	3.3V	5V	10	NC
Ground	GND	8	GND	GND	9	GND	Ground

ONBOARD SETTINGS AND INDICATORS

ETH 3 CLICK ELECTRICAL SPECIFICATIONS

Software Support

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