The SEGGER J-Link BASE Compact (part number 8.19.00) is a USB-powered JTAG/SWD debug probe in a 46mm x 46mm x 17mm housing, with a 1.2V to 5V target interface, up to 15 MHz target interface speed and download speeds up to 1 MB/s. It has the same J-Link BASE feature set as the desktop Classic model, with a USB-C host port and two mounting holes so it can stay inside a test fixture or end equipment. It suits firmware bring-up on Arm Cortex, RISC-V, Renesas RX and Microchip PIC32 targets, and fixed debug or programming stations where a full-size probe will not fit.
Compact JTAG/SWD Debug Probe Built for Fixtures
At 20g and 46mm square, with two mounting holes, the Compact is built to be fixed inside equipment housings, test jigs and development systems. The host link is USB 2.0 Hi-Speed over USB-C, and the probe is USB powered. On the target side it uses the standard J-Link 20-pin 0.1" connector found on most J-Link models. Pin assignments and adapter options are in our SEGGER J-Link 20-pin connector pinout guide.
Target Interfaces and Supported Cores
Current J-Link BASE hardware supports JTAG, cJTAG, SWD, SWD multi-drop, SWO, SPI, Microchip ICSP, Renesas FINE and Silicon Labs C2. SEGGER's supported cores list covers Arm Cortex-M0 to Cortex-M85, Cortex-A and Cortex-R, legacy ARM7 to ARM1176, RISC-V cores from SiFive, Andes, Codasip and Nuclei, Renesas RX, Microchip PIC32 and Silicon Labs EFM8. The probe can also supply the target with 5V at up to 300mA from the USB rail.
RTT, VCOM and Trace Buffer Support
SEGGER Real Time Transfer (RTT) moves data between the running target and the host through the debug connection, so you can log or interact with an application without a spare UART. Where a UART is available, the VCOM function bridges it to a virtual COM port on the PC using pins 5 (J-Link Tx) and 17 (J-Link Rx) of the 20-pin connector; VCOM works only when debugging over SWD. Embedded Trace Buffer (ETB) and Micro Trace Buffer (MTB) are supported where the target implements them.
Software and IDE Compatibility
The J-Link software and firmware updates are free. Setup and control software runs on Windows (x86-64 and Arm64), Linux (x86-64 and Arm64) and macOS (x86-64 and Apple Silicon). SEGGER lists full support in SEGGER Embedded Studio, Eclipse, IAR EWARM, Keil MDK-ARM, STM32CubeIDE, MCUXpresso and Visual Studio Code, among others. Several J-Links can run from one PC, each identified by its serial number.
What Is in the Box
J-Link BASE Compact probe, 20-pin 0.1" ribbon cable and a USB-C cable. No adapter for 10-pin 0.05" Cortex Debug headers is included.
Specifications
| Host interface | USB 2.0 Hi-Speed, USB-C |
|---|---|
| Target interface | JTAG/SWD 20-pin, 0.1" (2.54mm) |
| Supported debug interfaces | JTAG, cJTAG, SWD, SWD multi-drop, SWO, SPI, Microchip ICSP, Renesas FINE, Silicon Labs C2 |
| Target interface voltage (VIF) | 1.2V to 5V |
| Target supply | 5V (derived from USB), max. 300mA |
| Target interface speed | Max. 15 MHz |
| SWO sampling frequency | Max. 30 MHz |
| Download speed | Up to 1 MB/s |
| Power supply | USB powered, max. 50mA plus target supply current |
| Dimensions (without cables) | 46mm x 46mm x 17mm |
| Weight (without cables) | 20g |
| Operating temperature | +5°C to +60°C |
| Storage temperature | -20°C to +65°C |
| Relative humidity | Max. 90% rH, non-condensing |
| EMC | EN 55022, EN 55024 |
| Host OS | Windows and Linux (x86-64, Arm64); macOS (x86-64, Apple Silicon) |
Limitations
- J-Flash and J-Flash SPI, Unlimited Flash Breakpoints, the Ozone debugger and the RDI licence pack are not included, and SEGGER lists monitor-mode debugging under the PLUS upgrade. They come with the J-Link PLUS, or with the BASE to PLUS upgrade licence for an existing BASE.
- Download speed is up to 1 MB/s; SEGGER quotes up to 4 MB/s for higher-tier J-Link models.
- No ETM trace (use SEGGER J-Trace) and no QSPI target interface.
- VCOM is available only when debugging over SWD.
J-Link BASE Compact Compared with Related Models
| Model | Form factor | Host connector | J-Flash, Ozone, Unlimited Flash Breakpoints | Price ex VAT |
|---|---|---|---|---|
| J-Link BASE Compact (this product) | 46 x 46 x 17mm, 20g, two mounting holes | USB-C | Not included | £470 |
| J-Link BASE Classic | 100 x 53 x 27mm, 70g | USB Type B | Not included | £470 |
| J-Link PLUS Compact | 46 x 46 x 17mm, two mounting holes | USB | Included | £660 |
| J-Link Upgrade BASE to PLUS | Licence for an existing BASE | n/a | Adds them | £320 |
Typical Applications
Flash download and source-level debug of STM32, NXP LPC and Kinetis Cortex-M parts from STM32CubeIDE or MCUXpresso. A probe fixed inside a test jig, wired to a 20-pin header, for repeat debug access to Cortex-M33 or RISC-V boards in validation. RTT logging from a target with no free UART during firmware bring-up.
Choose the Compact for a fixture or enclosure; for the bench, the Classic carries the same feature set in a larger housing.
Order the J-Link BASE Compact for £470 ex VAT. Check your part number against SEGGER's supported devices list, or ask us for a formal quotation. See the full range in our SEGGER debug probes collection.
Frequently Asked Questions
What Is the Difference Between the BASE Compact and the BASE Classic?
The housing and the host connector. The Compact measures 46mm x 46mm x 17mm, weighs 20g, has two mounting holes and a USB-C port; the Classic measures 100mm x 53mm x 27mm, weighs 70g and uses USB Type B. SEGGER lists no difference in electrical or performance specification.
Can the J-Link BASE Compact Power My Target Board?
Yes, within limits. It supplies 5V derived from USB at up to 300mA on the 20-pin connector. Boards that need more current, or a different supply voltage, need their own supply.
Does It Connect to a 10-Pin 0.05" Cortex Debug Header?
Not directly. The probe has the 20-pin 0.1" J-Link connector, so a 10-pin Cortex Debug header needs a SEGGER adapter. Our 20-pin pinout guide lists the signal assignments and the adapters.